Okay thanks so much for providing that. I see in the datasheet that there is a typical applications schematic which I could probably adapt without to much trouble (let me know if I am wrong!).
The one question I have here is that your pinout shows the use of 3 I2S pins, whereas the datasheet shows the use of 4 pins for digital communication. I assume that those which you use are BCLK, LRCLK, and DOUT, since those are essential to the I2S protocol, and since I see that there is a feature of the chip to supply an internal SCLK via PLL. What is then done with the SCLK pin? Is it tied low to keep it at ground level?
Also, is I2S called PCM on your pinouts? I see the 3 pins for I2S are PCM FS (Frame Select? = LRCLK), PCM CLK (BCLK?) and PCM DOUT.