Cannot get RM2 breakout working

Support
1

I’m trying out a RM2 breakout which I purchased last month. I soldered pins onto the board and am wiring it up using breadbord with a Pico 1. Using the SDK I have these definitions in CMakelists.txt:

target_compile_definitions(blinkrm2 PRIVATE
CYW43_DEFAULT_PIN_WL_CLOCK=5
CYW43_DEFAULT_PIN_WL_DATA_IN=4
CYW43_DEFAULT_PIN_WL_DATA_OUT=4
CYW43_DEFAULT_PIN_WL_HOST_WAKE=4
CYW43_DEFAULT_PIN_WL_CS=3
CYW43_DEFAULT_PIN_WL_REG_ON=2
)

But initialization consistently fails with

Failed to read test pattern
[CYW43] Failed to start CYW43

I believe I have the wiring correct. Are there any other definitions required?

Thanks

2

You might want to also set

    CYW43_PIO_CLOCK_DIV_INT=2
    CYW43_PIO_CLOCK_DIV_FRAC=0

Note that setting the INT-variable to 3 is more conservative I think. But better check the SDK and/or the CYW driver.

The core of the problem is that the RM2 is a bit picky about the signals and wiring on a breadboard might not be the best thing to do.

3

RM2 requires a firmware file to be sent over the bus to initialise the chip, is that being done? If not, the datasheet says:

Firmware loading. The Pico SDK supports the CYW43 only if PICO_CYW43_SUPPORTED is set to true

And I think that tells the SDK to sent the firmware over at boot.

4

Tried those clock divisor settings - no change.

5

Could you post a picture of your soldering / wiring.

6

Pictures of both sides of the RM2 and the wiring on the RM2 and on the Pico.
red = 3.3v
blue = WL ON (GP2)
yellow = CS (GP3)
green = DAT (GP4)
orange = CLK (GP5)
black = GND (pin 18)

picowiring
picowiring1920×2550 641 KB

rm2wiring
rm2wiring1920×2550 675 KB

rm2underside
rm2underside1920×2550 701 KB

rm2topside
rm2topside1920×1446 376 KB

7

Your wiring seems okay to me.

From what I remember, when lowering the clock rate (which is basically needed for comms over jumper jerky of that length), the PIO program has to be switched to one that’s designed for those rates. Looks like the program can be changed by defining CYW43_SPI_PROGRAM_NAME.

8

Hm, I was always wondering why the CYW43 started failing when I change the cpu speed dynamically. But as I see now it depends on a compile-time define.

9

You can see in here, there’s a bunch of PIO programs with slightly different timings. I guess at different clock speeds those timings have an effect on what data is received by the CYW43 due to transition times. That was my experience at least when developing the Yukon RM2 module.

10

Seems the device was faulty - Pimoroni organized a replacement and it works now - using a SP/CE to dupont cable this time.

Thanks to all at Pimoroni for the support on this.