I faced a problem with my Explorer pHAT. The I2C-bus (SDA and SCL) on the Raspberry Pi get to around 3.8V when this pHAT is connected, which is higher than the supply voltage of 3.3V.
After some reverse engineering, I think the problem is the bi-directional level shifter with a MOSFET (BSS138 I assume) which is used on the I2C-bus to convert from 3.3V of Raspberry Pi to 5V of the ADS1015 and vice-versa. When both sides of the level shifter are pulled high (to 3.3V and 5V respectively), they both have voltage of around 3.8V. The reason is most likely that the high-voltage side is connected to the source and gate of the transistor and the low-voltage side is connected to the drain. Therefore, the source is pulled low to 3.3V via the drain-substrate diode and the gate-source voltage increases above threshold, which results in the transistor to start conducting. At some point, the voltage reaches an equilibrium of 3.8 V at both sides.
My concern is now that the voltage on the I2C-bus on the 3.3V side is higher than the VDD, which is definitely in violation of the datasheets for any I2C device. I plan to use other I2C ICs on Raspberry Pi (RTC, GPIO extender) and I’m afraid those will be damaged by the higher voltage. Also for ADS1015 the SDA and SCL voltage of 3.8V is barely higher than the limit of 0.7*VDD.
Do you think it is a technical flaw of the Explorer pHAT? And is there a simple way to get the voltage to 3.3V on the low side?